8: 2017-09-14 (木) 23:14:01 takaboo |
9: 2017-11-12 (日) 23:28:19 takaboo |
| | | |
| なお、統合環境は準備中のため、ファームウェアのみ以下に公開しますので、対応プロトコルに応じてコンパイル済みのbinファイルを転送して使用して下さい。 | | なお、統合環境は準備中のため、ファームウェアのみ以下に公開しますので、対応プロトコルに応じてコンパイル済みのbinファイルを転送して使用して下さい。 |
- | #ref(E097_SMPLBETA.zip) | + | #ref(E097_CLIENT_SMPL.zip) |
| + | また、簡易的ではありますがWindows用の通信プログラム(DXCONF32.exe)を同梱してありますので、コントロールテーブルを操作する際に使用して下さい。 |
| | | |
| ****通信プロトコル [#xd55d8ad] | | ****通信プロトコル [#xd55d8ad] |
| |=''Address''|=''Item''|=''Access''|=''Default Value''|=''Type/Range''|h | | |=''Address''|=''Item''|=''Access''|=''Default Value''|=''Type/Range''|h |
| |CENTER:|LEFT:|CENTER:|CENTER:|CENTER:|c | | |CENTER:|LEFT:|CENTER:|CENTER:|CENTER:|c |
- | |0 (0x0)|BGCOLOR(silver):[[Model Number>#n4d55da8]]|R|0x4020|uint16| | + | |0 (0x0)|BGCOLOR(beige):[[Model Number>#n4d55da8]]|R|0x4020|uint16| |
| |1 (0x1)|~|~|~|~| | | |1 (0x1)|~|~|~|~| |
- | |2 (0x2)|BGCOLOR(silver):[[Version of Firmware>#s44e01a9]]|R|?|uint8| | + | |2 (0x2)|BGCOLOR(beige):[[Version of Firmware>#s44e01a9]]|R|0x42|uint8| |
- | |3 (0x3)|BGCOLOR(lightgrey):[[ID>#cf9c14f9]]|R/W (NVM)|200|uint8&br;0~253| | + | |3 (0x3)|BGCOLOR(seashell):[[ID>#cf9c14f9]]|R/W (NVM)|200|uint8&br;0~253| |
- | |4 (0x4)|BGCOLOR(lightgrey):[[Baudrate>#y9835609]]|R/W (NVM)|1|uint8&br;0~254| | + | |4 (0x4)|BGCOLOR(seashell):[[Baudrate>#y9835609]]|R/W (NVM)|1|uint8&br;0~254| |
| |5 (0x5)|BGCOLOR(lightcyan):[[WriteNVM>#iee6d02c]]|R/W|0|uint8&br;0~1| | | |5 (0x5)|BGCOLOR(lightcyan):[[WriteNVM>#iee6d02c]]|R/W|0|uint8&br;0~1| |
| |6 (0x6)|BGCOLOR(lightcyan):[[LED>#db0623c9]]|R/W|0|uint8&br;0~1| | | |6 (0x6)|BGCOLOR(lightcyan):[[LED>#db0623c9]]|R/W|0|uint8&br;0~1| |
- | |7 (0x7)|BGCOLOR(lightgrey):[[Pin Config 0>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |7 (0x7)|BGCOLOR(seashell):[[Pin Config 0>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |8 (0x8)|BGCOLOR(lightgrey):[[Pin Config 1>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |8 (0x8)|BGCOLOR(seashell):[[Pin Config 1>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |9 (0x9)|BGCOLOR(lightgrey):[[Pin Config 2>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |9 (0x9)|BGCOLOR(seashell):[[Pin Config 2>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |10 (0xA)|BGCOLOR(lightgrey):[[Pin Config 3>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |10 (0xA)|BGCOLOR(seashell):[[Pin Config 3>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |11 (0xB)|BGCOLOR(lightgrey):[[Pin Config 4>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |11 (0xB)|BGCOLOR(seashell):[[Pin Config 4>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |12 (0xC)|BGCOLOR(lightgrey):[[Pin Config 5>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |12 (0xC)|BGCOLOR(seashell):[[Pin Config 5>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |13 (0xD)|BGCOLOR(lightgrey):[[Pin Config 6>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |13 (0xD)|BGCOLOR(seashell):[[Pin Config 6>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |14 (0xE)|BGCOLOR(lightgrey):[[Pin Config 7>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |14 (0xE)|BGCOLOR(seashell):[[Pin Config 7>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |15 (0xF)|BGCOLOR(lightgrey):[[Pin Config 8>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |15 (0xF)|BGCOLOR(seashell):[[Pin Config 8>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |16 (0x10)|BGCOLOR(lightgrey):[[Pin Config 9>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |16 (0x10)|BGCOLOR(seashell):[[Pin Config 9>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |17 (0x11)|BGCOLOR(lightgrey):[[Pin Config 10>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |17 (0x11)|BGCOLOR(seashell):[[Pin Config 10>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |18 (0x12)|BGCOLOR(lightgrey):[[Pin Config 11>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |18 (0x12)|BGCOLOR(seashell):[[Pin Config 11>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |19 (0x13)|BGCOLOR(lightgrey):[[Base Clock>#gc9bef4b]]|R/W (NVM)|0|uint8&br;0~10| | + | |19 (0x13)|BGCOLOR(silver):(reserve)|R|-|uint8| |
- | |20 (0x14)|BGCOLOR(lightcyan):[[PWM Cycle 0>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |20 (0x14)|BGCOLOR(seashell):[[PWM Frequency>#x543dc01]]|R/W (NVM)|0|uint16&br;0~50000| |
| |21 (0x15)|^|^|^|^| | | |21 (0x15)|^|^|^|^| |
- | |22 (0x16)|BGCOLOR(lightcyan):[[PWM Duty 0>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |22 (0x16)|BGCOLOR(seashell):[[PWM Duty 0>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
| |23 (0x17)|^|^|^|^| | | |23 (0x17)|^|^|^|^| |
- | |24 (0x18)|BGCOLOR(lightcyan):[[PWM Cycle 1>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |24 (0x1A)|BGCOLOR(seashell):[[PWM Duty 1>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
- | |25 (0x19)|^|^|^|^| | + | |25 (0x1D)|^|^|^|^| |
- | |26 (0x1A)|BGCOLOR(lightcyan):[[PWM Duty 1>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |26 (0x1E)|BGCOLOR(seashell):[[PWM Duty 2>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
- | |27 (0x1B)|^|^|^|^| | + | |27 (0x1F)|^|^|^|^| |
- | |28 (0x1C)|BGCOLOR(lightcyan):[[PWM Cycle 2>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |28 (0x22)|BGCOLOR(seashell):[[PWM Duty 3>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
- | |29 (0x1D)|^|^|^|^| | + | |29 (0x23)|^|^|^|^| |
- | |30 (0x1E)|BGCOLOR(lightcyan):[[PWM Duty 2>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |30 (0x26)|BGCOLOR(seashell):[[PWM Duty 4>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
- | |31 (0x1F)|^|^|^|^| | + | |31 (0x27)|^|^|^|^| |
- | |32 (0x20)|BGCOLOR(lightcyan):[[PWM Cycle 3>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |32 (0x2A)|BGCOLOR(seashell):[[PWM Duty 5>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
- | |33 (0x21)|^|^|^|^| | + | |33 (0x2B)|^|^|^|^| |
- | |34 (0x22)|BGCOLOR(lightcyan):[[PWM Duty 3>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |34&br;~&br;43|BGCOLOR(silver):(reserve)|R|-|uint8| |
- | |35 (0x23)|^|^|^|^| | + | |
- | |36 (0x24)|BGCOLOR(lightcyan):[[PWM Cycle 4>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |
- | |37 (0x25)|^|^|^|^| | + | |
- | |38 (0x26)|BGCOLOR(lightcyan):[[PWM Duty 4>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |
- | |39 (0x27)|^|^|^|^| | + | |
- | |40 (0x28)|BGCOLOR(lightcyan):[[PWM Cycle 5>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |
- | |41 (0x29)|^|^|^|^| | + | |
- | |42 (0x2A)|BGCOLOR(lightcyan):[[PWM Duty 5>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |
- | |43 (0x2B)|^|^|^|^| | + | |
| |44 (0x2C)|BGCOLOR(lightcyan):[[Capture 0>#v88310ce]]|R/W|0|uint16&br;0~65535| | | |44 (0x2C)|BGCOLOR(lightcyan):[[Capture 0>#v88310ce]]|R/W|0|uint16&br;0~65535| |
| |45 (0x2D)|^|^|^|^| | | |45 (0x2D)|^|^|^|^| |
| |52 (0x34)|BGCOLOR(lightcyan):[[OUT>#]]|R/W|0|uint16&br;0~4095| | | |52 (0x34)|BGCOLOR(lightcyan):[[OUT>#]]|R/W|0|uint16&br;0~4095| |
| |53 (0x35)|^|^|^|^| | | |53 (0x35)|^|^|^|^| |
- | |54 (0x36)|BGCOLOR(silver):[[IN>#]]|R|-|uint16&br;0~4095| | + | |54 (0x36)|BGCOLOR(beige):[[IN>#]]|R|-|uint16&br;0~4095| |
| |55 (0x37)|^|^|^|^| | | |55 (0x37)|^|^|^|^| |
- | |56 (0x38)|BGCOLOR(silver):[[ADV 0>#a489271c]]|R|-|uint16&br;0~4095| | + | |56 (0x38)|BGCOLOR(beige):[[ADV 0>#a489271c]]|R|-|uint16&br;0~4095| |
| |57 (0x39)|^|^|^|^| | | |57 (0x39)|^|^|^|^| |
- | |58 (0x3A)|BGCOLOR(silver):[[ADV 1>#a489271c]]|R|-|uint16&br;0~4095| | + | |58 (0x3A)|BGCOLOR(beige):[[ADV 1>#a489271c]]|R|-|uint16&br;0~4095| |
| |59 (0x3B)|^|^|^|^| | | |59 (0x3B)|^|^|^|^| |
- | |60 (0x3C)|BGCOLOR(silver):[[ADV 2>#a489271c]]|R|-|uint16&br;0~4095| | + | |60 (0x3C)|BGCOLOR(beige):[[ADV 2>#a489271c]]|R|-|uint16&br;0~4095| |
| |61 (0x3D)|^|^|^|^| | | |61 (0x3D)|^|^|^|^| |
- | |62 (0x3E)|BGCOLOR(silver):[[ADV 3>#a489271c]]|R|-|uint16&br;0~4095| | + | |62 (0x3E)|BGCOLOR(beige):[[ADV 3>#a489271c]]|R|-|uint16&br;0~4095| |
| |63 (0x3F)|^|^|^|^| | | |63 (0x3F)|^|^|^|^| |
- | |64 (0x40)|BGCOLOR(silver):[[ADV 4>#a489271c]]|R|-|uint16&br;0~4095| | + | |64 (0x40)|BGCOLOR(beige):[[ADV 4>#a489271c]]|R|-|uint16&br;0~4095| |
| |65 (0x41)|^|^|^|^| | | |65 (0x41)|^|^|^|^| |
- | |66 (0x42)|BGCOLOR(silver):[[ADV 5>#a489271c]]|R|-|uint16&br;0~4095| | + | |66 (0x42)|BGCOLOR(beige):[[ADV 5>#a489271c]]|R|-|uint16&br;0~4095| |
| |67 (0x43)|^|^|^|^| | | |67 (0x43)|^|^|^|^| |
- | |68 (0x44)|BGCOLOR(silver):[[ADV 6>#a489271c]]|R|-|uint16&br;0~4095| | + | |68 (0x44)|BGCOLOR(beige):[[ADV 6>#a489271c]]|R|-|uint16&br;0~4095| |
| |69 (0x45)|^|^|^|^| | | |69 (0x45)|^|^|^|^| |
- | |70 (0x46)|BGCOLOR(silver):[[ADV 7>#a489271c]]|R|-|uint16&br;0~4095| | + | |70 (0x46)|BGCOLOR(beige):[[ADV 7>#a489271c]]|R|-|uint16&br;0~4095| |
| |71 (0x47)|^|^|^|^| | | |71 (0x47)|^|^|^|^| |
- | |72 (0x48)|BGCOLOR(silver):[[ADV 8>#a489271c]]|R|-|uint16&br;0~4095| | + | |72 (0x48)|BGCOLOR(beige):[[ADV 8>#a489271c]]|R|-|uint16&br;0~4095| |
| |73 (0x49)|^|^|^|^| | | |73 (0x49)|^|^|^|^| |
- | |74 (0x4A)|BGCOLOR(silver):[[ADV 9>#a489271c]]|R|-|uint16&br;0~4095| | + | |74 (0x4A)|BGCOLOR(beige):[[ADV 9>#a489271c]]|R|-|uint16&br;0~4095| |
| |75 (0x4B)|^|^|^|^| | | |75 (0x4B)|^|^|^|^| |
- | |76 (0x4C)|BGCOLOR(silver):[[ADV 10>#a489271c]]|R|-|uint16&br;0~4095| | + | |76 (0x4C)|BGCOLOR(beige):[[ADV 10>#a489271c]]|R|-|uint16&br;0~4095| |
| |77 (0x4D)|^|^|^|^| | | |77 (0x4D)|^|^|^|^| |
- | |78 (0x4E)|BGCOLOR(silver):[[ADV 11>#a489271c]]|R|-|uint16&br;0~4095| | + | |78 (0x4E)|BGCOLOR(beige):[[ADV 11>#a489271c]]|R|-|uint16&br;0~4095| |
| |79 (0x4F)|^|^|^|^| | | |79 (0x4F)|^|^|^|^| |
| |80 (0x50)|BGCOLOR(lightcyan):[[USER 0>#]]|R/W|0|uint8&br;0~255| | | |80 (0x50)|BGCOLOR(lightcyan):[[USER 0>#]]|R/W|0|uint8&br;0~255| |
| -6~11:PWM0~5~ | | -6~11:PWM0~5~ |
| PWM出力~ | | PWM出力~ |
- | [[PWM Dutyレジスタ>#x543dc01]]/[[PWM Cycleレジスタ>#mf48bbdc]]の比でパルス出力される | + | [[PWM Frequencyレジスタ>#x543dc01]]の周波数で[[PWM Dutyレジスタ>#mf48bbdc]]で指定されたデューティー比でパルス出力する |
| -12~15:MPW0~3~ | | -12~15:MPW0~3~ |
| パルス幅計測~ | | パルス幅計測~ |
| 本設定以外の機能を割り当てる際に設定 | | 本設定以外の機能を割り当てる際に設定 |
| | | |
- | *****Base Clock [#gc9bef4b] | + | *****PWM Frequency [#x543dc01] |
- | タイマ機能(PWM,MPW,MPC)を使用する機能を割り当てた際の基準クロックを選択します。ベースクロックは全タイマ共通となります。 | + | PWM出力時の周波数を設定します。~ |
| + | Frequency [Hz] = Value * 1 |
| + | ※Rev.Bより対応 |
| | | |
- | ※現時点で機能しません | + | *****PWM Duty 0~5 [#mf48bbdc] |
- | | + | PWM出力時の各端子のデューティー比を設定します。~ |
- | *****PWM Cycle 0~5 [#mf48bbdc] | + | Duty [%] = Value * 100 [%] / 65535 |
- | GPIOにPWM機能を割り当てた際に、各PWMのカウンタのオーバーフロー値を設定します。 | + | ※Rev.Bより対応 |
- | | + | |
- | ※現時点で機能しません | + | |
- | | + | |
- | *****PWM Duty 0~5 [#x543dc01] | + | |
- | GPIOにPWM機能を割り当てた際に、PWM Cycle値以下でデューティーを設定します。 | + | |
- | | + | |
- | ※現時点で機能しません | + | |
| | | |
| *****Capture 0~5 [#v88310ce] | | *****Capture 0~5 [#v88310ce] |
| 任意の自作タスクとコントロールテーブル間のI/Fです。使い道は自由です。 | | 任意の自作タスクとコントロールテーブル間のI/Fです。使い道は自由です。 |
| | | |
- | ****Dynamixel Protocol V2コントロールテーブル [#q5182ba9] | |
| |=''Address''|=''Item''|=''Access''|=''Default Value''|=''Type/Range''|h | | |=''Address''|=''Item''|=''Access''|=''Default Value''|=''Type/Range''|h |
| |CENTER:|LEFT:|CENTER:|CENTER:|CENTER:|c | | |CENTER:|LEFT:|CENTER:|CENTER:|CENTER:|c |
- | |0 (0x0)|BGCOLOR(silver):[[Model Number>#n4d55da8]]|R|0x4020|uint16| | + | |0 (0x0)|BGCOLOR(beige):[[Model Number>#n4d55da8]]|R|0x4020|uint16| |
| |1 (0x1)|~|~|~|~| | | |1 (0x1)|~|~|~|~| |
- | |2 (0x2)|BGCOLOR(silver):Model Information|R|0|uint32| | + | |2 (0x2)|BGCOLOR(beige):Model Information|R|0|uint32| |
| |3 (0x3)|~|~|~|~| | | |3 (0x3)|~|~|~|~| |
| |4 (0x4)|~|~|~|~| | | |4 (0x4)|~|~|~|~| |
| |5 (0x5)|~|~|~|~| | | |5 (0x5)|~|~|~|~| |
- | |6 (0x6)|BGCOLOR(silver):[[Version of Firmware>#s44e01a9]]|R|?|uint8| | + | |6 (0x6)|BGCOLOR(beige):[[Version of Firmware>#s44e01a9]]|R|0x42|uint8| |
- | |7 (0x7)|BGCOLOR(lightgrey):[[ID>#cf9c14f9]]|R/W (NVM)|200|uint8&br;0~253| | + | |7 (0x7)|BGCOLOR(seashell):[[ID>#cf9c14f9]]|R/W (NVM)|200|uint8&br;0~253| |
- | |8 (0x8)|BGCOLOR(lightgrey):[[Baudrate>#lfd52625]]|R/W (NVM)|1|uint8&br;0~4| | + | |8 (0x8)|BGCOLOR(seashell):[[Baudrate>#lfd52625]]|R/W (NVM)|1|uint8&br;0~4| |
| |9 (0x9)|BGCOLOR(lightcyan):[[WriteNVM>#iee6d02c]]|R/W|0|uint8&br;0~1| | | |9 (0x9)|BGCOLOR(lightcyan):[[WriteNVM>#iee6d02c]]|R/W|0|uint8&br;0~1| |
| |10 (0xA)|BGCOLOR(lightcyan):[[LED>#db0623c9]]|R/W|0|uint8&br;0~1| | | |10 (0xA)|BGCOLOR(lightcyan):[[LED>#db0623c9]]|R/W|0|uint8&br;0~1| |
- | |11 (0xB)|BGCOLOR(lightgrey):[[Pin Config 0>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |11 (0xB)|BGCOLOR(seashell):[[Pin Config 0>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |12 (0xC)|BGCOLOR(lightgrey):[[Pin Config 1>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |12 (0xC)|BGCOLOR(seashell):[[Pin Config 1>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |13 (0xD)|BGCOLOR(lightgrey):[[Pin Config 2>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |13 (0xD)|BGCOLOR(seashell):[[Pin Config 2>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |14 (0xE)|BGCOLOR(lightgrey):[[Pin Config 3>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |14 (0xE)|BGCOLOR(seashell):[[Pin Config 3>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |15 (0xF)|BGCOLOR(lightgrey):[[Pin Config 4>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |15 (0xF)|BGCOLOR(seashell):[[Pin Config 4>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |16 (0x10)|BGCOLOR(lightgrey):[[Pin Config 5>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |16 (0x10)|BGCOLOR(seashell):[[Pin Config 5>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |17 (0x11)|BGCOLOR(lightgrey):[[Pin Config 6>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |17 (0x11)|BGCOLOR(seashell):[[Pin Config 6>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |18 (0x12)|BGCOLOR(lightgrey):[[Pin Config 7>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |18 (0x12)|BGCOLOR(seashell):[[Pin Config 7>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |19 (0x13)|BGCOLOR(lightgrey):[[Pin Config 8>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |19 (0x13)|BGCOLOR(seashell):[[Pin Config 8>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |20 (0x14)|BGCOLOR(lightgrey):[[Pin Config 9>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |20 (0x14)|BGCOLOR(seashell):[[Pin Config 9>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |21 (0x15)|BGCOLOR(lightgrey):[[Pin Config 10>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |21 (0x15)|BGCOLOR(seashell):[[Pin Config 10>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |22 (0x16)|BGCOLOR(lightgrey):[[Pin Config 11>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| | + | |22 (0x16)|BGCOLOR(seashell):[[Pin Config 11>#xbae87b5]]|R/W (NVM)|0|uint8&br;0~20| |
- | |23 (0x17)|BGCOLOR(lightgrey):[[Base Clock>#gc9bef4b]]|R/W (NVM)|0|uint8&br;0~10| | + | |23 (0x17)|BGCOLOR(silver):(reserve)|R|-|uint8| |
- | |24 (0x18)|BGCOLOR(lightcyan):[[PWM Cycle 0>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |24 (0x18)|BGCOLOR(seashell):[[PWM Frequency>#x543dc01]]|R/W (NVM)|0|uint16&br;0~50000| |
| |25 (0x19)|^|^|^|^| | | |25 (0x19)|^|^|^|^| |
- | |26 (0x1A)|BGCOLOR(lightcyan):[[PWM Duty 0>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |26 (0x1A)|BGCOLOR(seashell):[[PWM Duty 0>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
| |27 (0x1B)|^|^|^|^| | | |27 (0x1B)|^|^|^|^| |
- | |28 (0x1C)|BGCOLOR(lightcyan):[[PWM Cycle 1>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |28 (0x1C)|BGCOLOR(seashell):[[PWM Duty 1>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
| |29 (0x1D)|^|^|^|^| | | |29 (0x1D)|^|^|^|^| |
- | |30 (0x1E)|BGCOLOR(lightcyan):[[PWM Duty 1>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |30 (0x1E)|BGCOLOR(seashell):[[PWM Duty 2>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
| |31 (0x1F)|^|^|^|^| | | |31 (0x1F)|^|^|^|^| |
- | |32 (0x20)|BGCOLOR(lightcyan):[[PWM Cycle 2>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |32 (0x20)|BGCOLOR(seashell):[[PWM Duty 3>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
| |33 (0x21)|^|^|^|^| | | |33 (0x21)|^|^|^|^| |
- | |34 (0x22)|BGCOLOR(lightcyan):[[PWM Duty 2>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |34 (0x22)|BGCOLOR(seashell):[[PWM Duty 4>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
| |35 (0x23)|^|^|^|^| | | |35 (0x23)|^|^|^|^| |
- | |36 (0x24)|BGCOLOR(lightcyan):[[PWM Cycle 3>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |36 (0x24)|BGCOLOR(seashell):[[PWM Duty 5>#mf48bbdc]]|R/W (NVM)|0|uint16&br;0~65535| |
| |37 (0x25)|^|^|^|^| | | |37 (0x25)|^|^|^|^| |
- | |38 (0x26)|BGCOLOR(lightcyan):[[PWM Duty 3>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |38&br;~&br;47|BGCOLOR(silver):(reserve)|R|-|uint8| |
- | |39 (0x27)|^|^|^|^| | + | |
- | |40 (0x28)|BGCOLOR(lightcyan):[[PWM Cycle 4>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |
- | |41 (0x29)|^|^|^|^| | + | |
- | |42 (0x2A)|BGCOLOR(lightcyan):[[PWM Duty 4>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |
- | |43 (0x2B)|^|^|^|^| | + | |
- | |44 (0x2C)|BGCOLOR(lightcyan):[[PWM Cycle 5>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |
- | |45 (0x2D)|^|^|^|^| | + | |
- | |46 (0x2E)|BGCOLOR(lightcyan):[[PWM Duty 5>#x543dc01]]|R/W|0|uint16&br;0~65535| | + | |
- | |47 (0x2F)|^|^|^|^| | + | |
| |48 (0x30)|BGCOLOR(lightcyan):[[Capture 0>#v88310ce]]|R/W|0|uint16&br;0~65535| | | |48 (0x30)|BGCOLOR(lightcyan):[[Capture 0>#v88310ce]]|R/W|0|uint16&br;0~65535| |
| |49 (0x31)|^|^|^|^| | | |49 (0x31)|^|^|^|^| |
| |56 (0x38)|BGCOLOR(lightcyan):[[OUT>#]]|R/W|0|uint16&br;0~4095| | | |56 (0x38)|BGCOLOR(lightcyan):[[OUT>#]]|R/W|0|uint16&br;0~4095| |
| |57 (0x39)|^|^|^|^| | | |57 (0x39)|^|^|^|^| |
- | |58 (0x3A)|BGCOLOR(silver):[[IN>#]]|R|-|uint16&br;0~4095| | + | |58 (0x3A)|BGCOLOR(beige):[[IN>#]]|R|-|uint16&br;0~4095| |
| |59 (0x3B)|^|^|^|^| | | |59 (0x3B)|^|^|^|^| |
- | |60 (0x3C)|BGCOLOR(silver):[[ADV 0>#a489271c]]|R|-|uint16&br;0~4095| | + | |60 (0x3C)|BGCOLOR(beige):[[ADV 0>#a489271c]]|R|-|uint16&br;0~4095| |
| |61 (0x3D)|^|^|^|^| | | |61 (0x3D)|^|^|^|^| |
- | |62 (0x3E)|BGCOLOR(silver):[[ADV 1>#a489271c]]|R|-|uint16&br;0~4095| | + | |62 (0x3E)|BGCOLOR(beige):[[ADV 1>#a489271c]]|R|-|uint16&br;0~4095| |
| |63 (0x3F)|^|^|^|^| | | |63 (0x3F)|^|^|^|^| |
- | |64 (0x40)|BGCOLOR(silver):[[ADV 2>#a489271c]]|R|-|uint16&br;0~4095| | + | |64 (0x40)|BGCOLOR(beige):[[ADV 2>#a489271c]]|R|-|uint16&br;0~4095| |
| |65 (0x41)|^|^|^|^| | | |65 (0x41)|^|^|^|^| |
- | |66 (0x42)|BGCOLOR(silver):[[ADV 3>#a489271c]]|R|-|uint16&br;0~4095| | + | |66 (0x42)|BGCOLOR(beige):[[ADV 3>#a489271c]]|R|-|uint16&br;0~4095| |
| |67 (0x43)|^|^|^|^| | | |67 (0x43)|^|^|^|^| |
- | |68 (0x44)|BGCOLOR(silver):[[ADV 4>#a489271c]]|R|-|uint16&br;0~4095| | + | |68 (0x44)|BGCOLOR(beige):[[ADV 4>#a489271c]]|R|-|uint16&br;0~4095| |
| |69 (0x45)|^|^|^|^| | | |69 (0x45)|^|^|^|^| |
- | |70 (0x46)|BGCOLOR(silver):[[ADV 5>#a489271c]]|R|-|uint16&br;0~4095| | + | |70 (0x46)|BGCOLOR(beige):[[ADV 5>#a489271c]]|R|-|uint16&br;0~4095| |
| |71 (0x47)|^|^|^|^| | | |71 (0x47)|^|^|^|^| |
- | |72 (0x48)|BGCOLOR(silver):[[ADV 6>#a489271c]]|R|-|uint16&br;0~4095| | + | |72 (0x48)|BGCOLOR(beige):[[ADV 6>#a489271c]]|R|-|uint16&br;0~4095| |
| |73 (0x49)|^|^|^|^| | | |73 (0x49)|^|^|^|^| |
- | |74 (0x4A)|BGCOLOR(silver):[[ADV 7>#a489271c]]|R|-|uint16&br;0~4095| | + | |74 (0x4A)|BGCOLOR(beige):[[ADV 7>#a489271c]]|R|-|uint16&br;0~4095| |
| |75 (0x4B)|^|^|^|^| | | |75 (0x4B)|^|^|^|^| |
- | |76 (0x4C)|BGCOLOR(silver):[[ADV 8>#a489271c]]|R|-|uint16&br;0~4095| | + | |76 (0x4C)|BGCOLOR(beige):[[ADV 8>#a489271c]]|R|-|uint16&br;0~4095| |
| |77 (0x4D)|^|^|^|^| | | |77 (0x4D)|^|^|^|^| |
- | |78 (0x4E)|BGCOLOR(silver):[[ADV 9>#a489271c]]|R|-|uint16&br;0~4095| | + | |78 (0x4E)|BGCOLOR(beige):[[ADV 9>#a489271c]]|R|-|uint16&br;0~4095| |
| |79 (0x4F)|^|^|^|^| | | |79 (0x4F)|^|^|^|^| |
- | |80 (0x50)|BGCOLOR(silver):[[ADV 10>#a489271c]]|R|-|uint16&br;0~4095| | + | |80 (0x50)|BGCOLOR(beige):[[ADV 10>#a489271c]]|R|-|uint16&br;0~4095| |
| |81 (0x51)|^|^|^|^| | | |81 (0x51)|^|^|^|^| |
- | |82 (0x52)|BGCOLOR(silver):[[ADV 11>#a489271c]]|R|-|uint16&br;0~4095| | + | |82 (0x52)|BGCOLOR(beige):[[ADV 11>#a489271c]]|R|-|uint16&br;0~4095| |
| |83 (0x53)|^|^|^|^| | | |83 (0x53)|^|^|^|^| |
| |84 (0x54)|BGCOLOR(lightcyan):[[USER 0>#]]|R/W|0|uint8&br;0~255| | | |84 (0x54)|BGCOLOR(lightcyan):[[USER 0>#]]|R/W|0|uint8&br;0~255| |